JayanthChillarige
Jayanth Chillarige

Biography

Computer Engineer · Electronics Engineer

Seeking a full-time role to apply technical knowledge and hands-on experience in Front-end RTL Design, system reliability modeling, and embedded hardware.

Focus RTL · Reliability · VLSI Design
Based in Hammond, IN

Education Snapshot

  • Current M.S. Electrical & Computer Engineering · Purdue University Northwest
  • GPA (M.S.) 3.9 / 4.0
  • Undergrad B.Tech Electronics & Communication · SRM IST
  • Availability Full-time
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About Me

From early curiosity to fault-tolerant hardware.

I am a master’s student in Electrical and Computer Engineering at Purdue University, currently working on my thesis focused on detecting faults during PCB fabrication. My fascination with electronics began early and has grown through academic excellence, hands-on projects, and research in areas such as VLSI, digital systems, and hardware design.

Experiences with Verilog, embedded systems, machine learning applications, and an internship at ECIL strengthened my interest in hardware reliability and integrated circuit design. My goal is to become an RTL design engineer and contribute to developing robust, efficient semiconductor and PCB technologies for next-generation electronic systems.

RTL Design PCB Fault Detection VLSI & Digital Systems Hardware Reliability

The work that matters

Featured Research and Professional Experience.

16-bit RISC Processor Design (Internship)

Electronics Corporation of India Limited (ECIL) · 12/2022 – 03/2023

  • Designed and simulated a 16-bit RISC processor using Verilog in the Vivado Design Suite.
  • Implemented Harvard architecture with separate data and instruction memory.
  • Reduced execution time for arithmetic and logic operations on 16-bit data paths.

Research: System Reliability Prediction (ANN)

Predicting reliability of K-out-of-N systems · 06/2025 – 11/2025

  • Developed an Artificial Neural Network model to estimate reliability of K-out-of-N systems.
  • Used supervised learning and multilayer perceptrons for reliability approximation.
  • Evaluated a 13-out-of-20 power distribution system with low mean deviation.

Research: PCB Fault Detection (Multimodal ML)

Detecting and classifying fabrication faults using deep learning · 01/2025 – 12/2025

  • Used Convolutional Neural Networks for PCB defect classification and fine-tuning.
  • Employed image descriptors like Local Binary Pattern to capture PCB surface textures.
  • Thesis focuses on machine learning models to detect printed circuit board anomalies.

Academic and Lab Support

Teaching & lab assistant roles across core ECE courses.

  • Served as instructor for Digital Fundamentals.
  • Guided labs in Analog and Digital Circuits using BJTs, MOSFETs, and diodes.
  • Assisted with Introduction to MATLAB for simulation and verification workflows.

Validated performance

Quantifiable results from key projects.

PCB Fault Detection Accuracy 95.08%

Achieved classification accuracy using a multimodal machine learning architecture.

Reliability Model Deviation 0.000158

Mean deviation achieved by the ANN model when estimating reliability for a 13-out-of-20 system.

Dual-Band Antenna Support S-band & X-band

Developed a cost-effective antenna supporting cellular (3.3–3.8 GHz) and satellite communication (8–12 GHz).

Languages Spoken 4

English, Hindi, Telugu, and French—supporting communication in diverse teams.

Tools of choice

A stack tuned for digital, embedded, and data-driven work.

Digital & RTL

  • Verilog / VHDL
  • RTL Design
  • Vivado Design Suite
  • Advanced Digital System Design
  • Microprocessors & Microcontrollers

Embedded & Software

  • Python
  • MATLAB
  • C++
  • Analog Electronic Circuits
  • CMOS Analog IC Design

Data & Systems

  • Neural Networks
  • Machine Learning
  • PCB Design
  • Digital Signal Processing
  • VLSI Design

Next step

Want a deeper view than the nutshell?

I’m happy to share detailed project breakdowns, RTL samples, or discuss how I’d approach your specific architecture or reliability challenges.

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